PRiME is a £5.6m EPSRC funded five year program (2013-2018) which brings together four universities (University of Southampton, Imperial College London, University of Manchester, University of Newcastle) with world-leading expertise in the complementary research areas of; low-power, highly-parallel, reconfigurable and dependable computing and verified software design.

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Working in collaboration with industrial partners (ARM, Imagination Technologies, Altera, Microsoft Research, Freescale) and international visiting experts, PRiME’s objective is to tackle the challenge of developing the theory and practice of future high-performance embedded systems, which utilize many-core processors, to enable processor core scaling with sustainable energy consumption and reliability.

Moortec have been a PRiME Programme Associate since 2015. The PRiME Associate membership is designed for companies who operate in fields with a clear synergy to the research areas being pursued by PRiME.

PRiME have recently released a research paper on embedded processor power estimation/modelling.

Power Estimation of Embedded Processors using real-time, online power models

Accurately estimating CPU power consumption is a key requirement for controlling CPUs, particularly when implementing complex energy saving techniques – and for exploring the CPU design space.

Some hardware designs offer real-time power consumption data which can be exploited by e.g. run-time management software.  Often, however, this data is only at a cluster level rather than individual processor cores, offering less flexibility, granularity and opportunity for power savings.

PRiME researchers, in conjunction with ARM,  have developed a tool, PowMon, that uses models built and validated from real, measured data from an actual device. This means that the tool accuracy is known and therefore the power figures can be trusted. These models can be run online, giving accurate real-time power consumption data per core – particularly valuable in situations where individual core power data isn’t available from the hardware. This opens up the possibility of much more efficient power management

Read and download the research paper on run-time power modelling of embedded CPUs at:

University of Southampton eprints

or

IEEE Explore

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